A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix–Matrix Multiplication Accelerator
نویسندگان
چکیده
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ژورنال
عنوان ژورنال: IEEE Journal of Solid-State Circuits
سال: 2020
ISSN: 0018-9200,1558-173X
DOI: 10.1109/jssc.2019.2960480